DG645 Digital Delay Pulse Generator

DG645 Digital Delay Generator

The DG645 is a versatile digital delay/pulse generator that delivers precisely defined pulses at repetition frequencies up to 10 MHz. The instrument offers several improvements over older designs, including lower jitter, higher accuracy, faster trigger rates, and more outputs.The DG645 also features Ethernet, GPIB, and RS-232 interfaces for computer or network control of the instrument.

Delay generator timing

All digital delay generators measure time intervals by counting the period of a fast clock (typically 100 MHz). Most digital delay generators also have shorter programmable analog delays to achieve time intervals with finer resolution than the clock period. Unfortunately, if the flip-flop is out of phase with the clock, a clock period with uncertain timing (typically 10 ns) may occur.

The DG645 eliminates timing uncertainty by measuring the timing of the flip-flop relative to the internal clock and compensating for the analog delay. This approach reduces jitter by approximately 100× and allows the internal rate generator to run at any rate, not just a submultiple of the clock frequency.

trig

The DG645 has a variety of trigger modes. The internal rate generator has a cycle jitter of less than 100 ps and can be set from 100 μHz to 10 MHz with a resolution of 1 μHz. external trigger inputs with adjustable thresholds and slopes can trigger timed cycles, cycle bursts, or single shots. A single shot can be triggered with a single key press. Line triggers run in synchronization with the AC power supply. A rear panel trigger inhibit input disables the trigger or any pulse output during the timing cycle.

The DG645 supports many complex triggering requirements with trigger delay and pre-scaling features.

Trigger Delay sets the minimum time between successive triggers. This is useful if a trigger event in an application generates a significant noise transient that takes time to decay before the next trigger is generated. Trigger Delay can also be used to trigger the DG645 at a submultiple of the input trigger rate.

Trigger prescaling allows the DG645 to trigger in synchronization with a faster source, but at a submultiple of the original trigger frequency. For example, the DG645 can trigger at 1 kHz, but synchronize with a mode-locked laser running at 80 MHz by prescaling the trigger input by 80,000. In addition, the DG645 includes a separate prescaler for each front panel output so that each output operates at a submultiple of the trigger rate.

Front Panel Outputs

There are five front panel outputs: T0, AB, CD, EF and GH. the T type 0 output is set for the duration of the timing cycle. leading edge 0 of T is the zero time reference. Programmed delays (A, B, C, D, E, F, G, and H) are set from 0 s to 2000 s with a resolution of 5 ps to control the timing of the leading and trailing edges of the four pulse outputs.

Each front panel output can drive a 50 Ω load and has a 50 Ω source impedance. The output amplitude can be set from 0.5 V to 5.0 V and the output detuning range can exceed ±2 VDC, allowing virtually any logic level (NIM, ECL, PECL, CMOS, etc.) to be powered. Output transition times are less than 2 ns at any output amplitude.

Rear Panel Output

Optional rear panel outputs are available to support a variety of applications. Option 1 provides T0 outputs and 8 programmed delays (A, B, C, D, E, F, G, and H) at 5 V logic levels with transition times of less than 1 ns. Option 2 provides the same outputs but in 30 V, 100 ns pulses, with transition times of less than 5 ns, for timing distribution in high-noise environments. Option 3 provides eight combined outputs that deliver 1 to 4 pulses at a 5 V logic level with a transition time of less than 1 ns. Each output has a 50 Ω source impedance.

time base

The standard time base has an accuracy of 5 ppm and jitter of 10-8 for a wide range of applications. Optional timebases are available for users who require higher rate and delay accuracy or reduced rate and delay jitter.

Timing errors can be as high as 5 μs for 1 s delay for standard timebases and 200 ns for OCXO timebases, but only 500 ps for rubidium timebases (all one year after calibration).

For short delays, jitter is typically 20 ps. However, for 1-second delays, the standard timebase can produce up to 10 ns of jitter, while the optional timebase can produce less than 10 ps of additional jitter.

Fast Rise Time Module

The DG645 front panel outputs have a transition time of less than 2 ns. The SRD1 is an accessory built into the inline BNC connector that reduces the rise time of the front panel outputs to less than 100 ps. Up to 5 SRD1s can be connected to the front panel to reduce the rise time of all outputs.